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High Performance ECC Circuits

Conventional ECC circuits require logic calculations that cause complex routing in circuit layout. The delay time of such conventional ECC circuits is typically limited by the RC delay of those metal lines. Conventional ECC circuits are much larger than logic circuits of equivalent gate count due to the complex routing.  Conventional ECC circuits also require a large number of test vectors to have enough test coverage.

UniRAM ECC circuit architectures arrange logic calculations in a rotational relationship that dramatically simplify routing of ECC circuits. The resulting ECC circuits have the following advantages:

  • Smaller area.
  • Faster: all routing are short lines, the speed is ~5 gate delays.
  • Consistency: the speed of 1024 bit ECC circuit is the same as the speed of 64 bit ECC.
  • Expandable: the same circuit unit used for 64 bit ECC can be used for 1024 bit or larger.
  • Test coverage: small number of vectors can fully cover wide ECC circuits.
Conventional ECC circuit (area dominated by complex routing)
UniRAM ECC circuit with equivalent function (high density circuit without complex routing)