Register-like High Density SRAM
The “small block architectures” are not only applicable to embedded DRAM but also applicable to other types of memory devices such as SRAM or CAM. SRAM designed under small block architecture behaves as a large (millions of bytes) register file instead of a conventional memory. A large (millions of Bytes) memory block arranged in small block architecture has the performance of a small register file. Memory devices are no longer sensitive small signal devices; our memory blocks are as robust as logic circuits. We do not need to use sense amplifiers. The consumption of our memory block is typically less than 10% the consumption of equivalent conventional SRAM. The design architectures also significantly reduce the area of multiple port memory devices. For example, the area of our dual port memory block is about 50% the area of conventional dual port memory blocks.
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